The present invention relates to a digital calculation type differential relay used in a bus bar of a power station and/or substation.
A differential relay involves a problem that when an external fault or accident of a bus bar occurs, DC components of currents caused by the fault magnetically saturate an iron core of a current transformer, resulting in an erroneous detection of the current transformer. When bus bar protection is performed, external fault currents, flowing into the bus bar through a number of bus bar terminals, often concentrate to one terminal, so that the concentrated current flows out to one power line from the bus bar. In this case, the magnitude of this one terminal current is increased, such that an iron core of a current transformer connected to this power line tends to be magnetically saturated. At this time, since each value of inflow currents from power lines of other terminals is relatively small, each of the current transformers connected to these power lines is hardly magnetically saturated (or often not magnetically saturated at all). When saturated and nonsaturated current transformers are present at the same time as described above, a differential current (i.e., vector sum of current transformer secondary currents where a current direction from the power line to the bus bar is assumed to be positive) can be increased, regardless of the external fault of the bus bar. Therefore, a relay of the bus bar erroneously responds to the external fault, resulting in a false operation of the relay.
Some differential relays have a countermeasure for magnetic saturation of a current transformer. For example, in a differential relay disclosed in Japanese Patent Publication No. 57-50130, when a value, obtained by subtracting an absolute value of a differential current (vector sum) from a value obtained by multiplying a sum (total scalar values) of an absolute value of each terminal current by a constant of not more than 1, is positive, a significantly large restraining quantity is generated. This will be described below with reference to the drawings.
FIG. 2A is a graph of measured waveforms of primary current Ip and secondary current Is of a current transformer obtained when a current transformer is saturated. As shown in FIG. 2A, intervals Ta and Tb are repeated for every one cycle of an AC component of current Ip. Within interval Ta, magnetic saturation of the current transformer does not occur and almost no error is involved in current Is, and within interval Tb, saturation occurs and a significant error is involved in current Is.
Assume that waveform Is in FIG. 2A represents a secondary current of a current transformer coupled to a terminal to which fault currents caused by the external fault flow, and that all the current transformers of terminals from which the fault current flows are not saturated. Then, a waveform of current Id is as shown in FIG. 2B. At this time, symbol Ir in FIG. 2B represents a sum of absolute values of power line currents of the respective terminals.
As shown in FIGS. 2A and 2B, the value of current Id is almost zero during interval Ta wherein no saturation of an iron core of the current transformer occurs and no error is involved in current Is. An apparatus disclosed in Japanese Patent Publication No. 57-50130 generates a large restraining quantity during interval Ta and stores it. As a result, even if current Id is increased, a false operation of the relay is prevented by this stored restraining quantity.
However, this apparatus has a drawback that when an internal fault occurs during the external fault, an operation of the relay is significantly delayed. FIGS. 3A to 3C show waveforms obtained in the case of this operation delay. In FIGS. 3A to 3C, current Ii is a sum of currents flowing into the bus bar; current Io, a power line current of a terminal from which the fault current flows during the external fault; Id, a differential current equal to a fault point current obtained where the internal fault occurs; Ir, a sum of absolute values of terminal currents; and time tl, a moment at which the internal fault occurs. An interval before time tl represents an occurrence of the external fault.
When the internal fault occurs at a phase of time tl in FIGS. 3A to 3C, the fault point current becomes a full offset waveform having a large DC component, as differential current Id of FIG. 3C. If the external fault has occurred at a position close to the internal fault occurrence position, most of changes in current, after the internal fault occurred, circulate between the internal and external fault occurrence points (this is the Thevenin's theorem). For this reason, inflow current sum Ii does not vary (FIG. 3A). An AC component of outflow terminal current Io before the internal fault occurs is cancelled by a change in current (AC component) after the internal fault occurred, so that only a DC component remains in Io, resulting in a waveform shown in FIG. 3B.
Since Io has such a waveform, sum Ir of absolute values of terminal currents has a waveform shown in FIG. 3C. A large restraining quantity is stored within an interval wherein differential current Id is small while the sum of absolute value Ir is large. In this case, the relay cannot be operated until the DC component of Io sufficiently decreases.
As described above, Japanese Patent Publication No. 57-50130 is arranged such that a fault operation is prevented even when the current transformer is significantly saturated. However, when the internal fault occurs during the external fault, the operation is significantly delayed in accordance with the fault current waveform. In the case of bus bar protection, an internal fault during the external fault often occurs, and this does not rarely happen. For instance, such an internal fault occurs when a circuit breaker fails to trip for the external fault and hence the circuit breaker is damaged.
In consideration of the above situation, Japanese Patent Application No. 61-120909 (to be referred to as a background technology hereinafter) was applied to the Japanese Patent Office by the present applicant, on May 26, 1986. In this background technology, differential current Id is sampled in a predetermined time interval and is converted into digital data. A value of differential function f(d) is calculated on the basis of a difference between a plurality of the predetermined number of data having different sampling times of differential current data Dd (or data equivalent thereto) obtained in the manner as described above. Thus, an operation of a differential relay means of the bus bar is inhibited under the condition that the above calculated value is much smaller than predetermined restraint value f(r). An embodiment described in the background technology sufficiently eliminates the problem of the apparatus disclosed in Japanese Patent Publication No. 57-50130. (All disclosures of the background technology (Japanese Patent Application No. 61-120909) are incorporated in the present application.)
In the embodiment of the background technology, restraint value f(r) corresponds to a maximum value of absolute values of the differential current data sampled in a predetermined interval, or to a maximum value of the sums of absolute values of the respective terminal current data sampled at the same time in the predetermined interval, and the predetermined interval corresponds to one cycle of the power line current (Ip) or more. A ratio f(d)/f(r) of a value of differential function f(d) to restraint value f(r) is sufficiently small during a nonsaturation interval wherein magnetic saturation of the current transformer does not occur by the external fault. On the other hand, in samples around a peak value of differential current Id obtained when the internal fault occurs, f(d)/f(r) is not so large, as is exemplified by f(d)/f(r)=7.7%. For this reason, sufficient care must be paid for design and fabrication of a circuit for forming f(d) so as not to inhibit the operation of the differential relay means on basis of determination that the value of differential function f(d) during occurrence of the internal fault is much smaller than restraint value f(r).